.. DO NOT EDIT. .. THIS FILE WAS AUTOMATICALLY GENERATED BY SPHINX-GALLERY. .. TO MAKE CHANGES, EDIT THE SOURCE PYTHON FILE: .. "auto_examples/basic/plot_stat.py" .. LINE NUMBERS ARE GIVEN BELOW. .. only:: html .. note:: :class: sphx-glr-download-link-note :ref:`Go to the end ` to download the full example code .. rst-class:: sphx-glr-example-title .. _sphx_glr_auto_examples_basic_plot_stat.py: ===================================== Traversal and Statistics of a Netlist ===================================== Traverse a netlist and collect statistics on the netlist. .. GENERATED FROM PYTHON SOURCE LINES 8-58 .. rst-class:: sphx-glr-script-out .. code-block:: none Netlist stats Top instance: fourBitCounter 2 libraries detected Library name: hdi_primitives 9 definitions detected Definition name: BUFG Definition used 1 times 2 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: IBUF Definition used 4 times 2 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: LUT1 Definition used 1 times 2 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I0 Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: LUT3 Definition used 1 times 4 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I0 Port Direction: IN Port length: 1 Port name: I1 Port Direction: IN Port length: 1 Port name: I2 Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: LUT4 Definition used 1 times 5 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I0 Port Direction: IN Port length: 1 Port name: I1 Port Direction: IN Port length: 1 Port name: I2 Port Direction: IN Port length: 1 Port name: I3 Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: LUT5 Definition used 1 times 6 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I0 Port Direction: IN Port length: 1 Port name: I1 Port Direction: IN Port length: 1 Port name: I2 Port Direction: IN Port length: 1 Port name: I3 Port Direction: IN Port length: 1 Port name: I4 Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: OBUF Definition used 4 times 2 ports detected Port name: O Port Direction: OUT Port length: 1 Port name: I Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: FDCE Definition used 4 times 5 ports detected Port name: Q Port Direction: OUT Port length: 1 Port name: C Port Direction: IN Port length: 1 Port name: CE Port Direction: IN Port length: 1 Port name: CLR Port Direction: IN Port length: 1 Port name: D Port Direction: IN Port length: 1 0 children detected 0 cables detected Definition name: INV Definition used 0 times 2 ports detected Port name: I Port Direction: IN Port length: 1 Port name: O Port Direction: OUT Port length: 1 0 children detected 0 cables detected Library name: work 1 definitions detected Definition name: fourBitCounter Definition used 1 times 5 ports detected Port name: clk Port Direction: IN Port length: 1 Port name: enable Port Direction: IN Port length: 1 Port name: inc_dec Port Direction: IN Port length: 1 Port name: rst Port Direction: IN Port length: 1 Port name: out Port Direction: OUT Port length: 4 17 children detected Child name: clk_IBUF_BUFG_inst Referenced Definition: BUFG Child name: clk_IBUF_inst Referenced Definition: IBUF Child name: enable_IBUF_inst Referenced Definition: IBUF Child name: inc_dec_IBUF_inst Referenced Definition: IBUF Child name: out_0__i_1 Referenced Definition: LUT1 Child name: out_1__i_1 Referenced Definition: LUT3 Child name: out_2__i_1 Referenced Definition: LUT4 Child name: out_3__i_1 Referenced Definition: LUT5 Child name: out_OBUF_0__inst Referenced Definition: OBUF Child name: out_OBUF_1__inst Referenced Definition: OBUF Child name: out_OBUF_2__inst Referenced Definition: OBUF Child name: out_OBUF_3__inst Referenced Definition: OBUF Child name: out_reg_0_ Referenced Definition: FDCE Child name: out_reg_1_ Referenced Definition: FDCE Child name: out_reg_2_ Referenced Definition: FDCE Child name: out_reg_3_ Referenced Definition: FDCE Child name: rst_IBUF_inst Referenced Definition: IBUF 15 cables detected Cable Name clk Number of wires: 1 Cable Name clk_IBUF Number of wires: 1 Cable Name clk_IBUF_BUFG Number of wires: 1 Cable Name enable Number of wires: 1 Cable Name enable_IBUF Number of wires: 1 Cable Name inc_dec Number of wires: 1 Cable Name inc_dec_IBUF Number of wires: 1 Cable Name out Number of wires: 4 Cable Name out_0__i_1_n_0 Number of wires: 1 Cable Name out_1__i_1_n_0 Number of wires: 1 Cable Name out_2__i_1_n_0 Number of wires: 1 Cable Name out_3__i_1_n_0 Number of wires: 1 Cable Name out_OBUF Number of wires: 4 Cable Name rst Number of wires: 1 Cable Name rst_IBUF Number of wires: 1 | .. code-block:: default import spydrnet as sdn # Loads the example ir = sdn.load_example_netlist_by_name("fourBitCounter") print("Netlist stats") print("Top instance:", ir.top_instance['EDIF.identifier']) print(str(len(ir.libraries)) + " libraries detected") # Loop through each library in a design for library in ir.libraries: # Gets the name of the current library and reports number of definitions print("Library name:", library['EDIF.identifier']) print("\t", str(len(library.definitions)), "definitions detected") # Loop through each definition in current library for definition in library.definitions: # Gets the name of the current definition and how many times its been used print("\tDefinition name:", definition['EDIF.identifier']) print("\t\t", "Definition used", str(len(definition.references)), "times") # Gets the number of Ports in definition print("\t\t", str(len(definition.ports)), "ports detected") # Loop through each port for the current definition for port in definition.ports: # Gets the name of the port print("\t\t\tPort name:", port['EDIF.identifier']) # Gets the direction of the port if port.direction is sdn.UNDEFINED: print("\t\t\t\tPort Direction: UNDEFINED") elif port.direction is sdn.INOUT: print("\t\t\t\tPort Direction: INOUT") elif port.direction is sdn.IN: print("\t\t\t\tPort Direction: IN") elif port.direction is sdn.OUT: print("\t\t\t\tPort Direction: OUT") # Gets the length (number of pins) of the port print("\t\t\t\tPort length:", str(len(port.pins))) # Get the number of children within the definition print("\t\t", str(len(definition.children)), "children detected") # Loops through each child for child in definition.children: # Gets the child's name and its referenced definition print("\t\t\tChild name:", child['EDIF.identifier']) print("\t\t\t\tReferenced Definition:", child.reference['EDIF.identifier']) # Gets the number of cables within the definition print("\t\t", str(len(definition.cables)), "cables detected") for cable in definition.cables: # Gets the name of the cable and the number of wires it contains print("\t\t\tCable Name", cable['EDIF.identifier']) print("\t\t\t\tNumber of wires:", len(cable.wires)) .. rst-class:: sphx-glr-timing **Total running time of the script:** (0 minutes 0.015 seconds) .. _sphx_glr_download_auto_examples_basic_plot_stat.py: .. only:: html .. container:: sphx-glr-footer sphx-glr-footer-example .. container:: sphx-glr-download sphx-glr-download-python :download:`Download Python source code: plot_stat.py ` .. container:: sphx-glr-download sphx-glr-download-jupyter :download:`Download Jupyter notebook: plot_stat.ipynb ` .. only:: html .. rst-class:: sphx-glr-signature `Gallery generated by Sphinx-Gallery `_